NEMS Based Standard Cell Modeling Flow
NEM Relay Layout Generation (KLayout)
Finite Element Modeling (COMSOL)
Extracted Parameters
Liberty Model Generation
Parasitics
NEM Relay Based Multiplexer (Standard Cell) Layout (Virtuoso)
CGRA Logical Design Flow
CGRA Generation (Genesis2)
Synthesis (Design Compiler)
Place-and- Route (Innovus)
RTLSimulation (Verilator)
VCD on ports
Gate-Level Simulation (VCS)
CGRA Application
Compiler
Configuration Bitstream
Switching Activity Power
Estimation (PrimeTime)
CGRA Physical Design Flow
Power Estimation