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DreamCity Innovations WCH CH340G Datasheet WCH CH340 Series USB Interface Integrated Circuit

CH340G USB to UART Interface Datasheet

WCH Version 1E DreamCity Version 1.0

Disclaimer from DreamCity Innovations

This is a third-party translation of WCH’s CH340 Series chipset’s Chinese datasheet, with information regarding CH340G chip extracted. The two other chips sharing the same datasheet, CH340R and C340T, have official English version.

1. Overview

CH340 is a series of USB bus adapters, that provides serial, parallel or IrDA interfaces over the USB bus (note: CH340G supports serial interface only). The CH340G integrate circuit provides common MODEM signals to allow adding a UART to a computer, or converting existing UART devices to USB interface.

2. Features

e Full-speed USB interface, compatible with USB 2.0 interface.

e Operates with a minimum amount of external components: a crystal and a minimum of four capacitors.

e Provides a virtual serial port for upgrading existing serial port devices or adding serial ports toa PC.

Supports all existing applications using serial ports without the need of changing existing code.

e Hardware full-duplex serial interface with internal FIFO. Baud rate range from 50bps to 2Mbps.

e Supports common flow control signals RTS, DTR, DCD, RI, DSR and CTS. Supports RS232, RS422 and RS485 with external level shifting components. e Uses CH341 driver.

Supports 5V and 3.3V operation.

e RoHS-compliant narrow body SO-16 package.

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DreamCity Innovations WCH CH340G Datasheet Table of Contents

CH340G USB to UART Interface Datasheet Disclaimer from DreamCity Innovations 1. Overview 2. Features Table of Contents 3. Specifications 3.1. Absolute Maximum Ratings 3.2. DC characteristics 3.3. AC characteristics 4. Pinout 5. Application Notes 5.1. Example: USB RS232 adapter 5.2. Example: Optically isolated USB to UART adapter

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3. Specifications

3.1. Absolute Maximum Ratings

WCH CH340G Datasheet

Operating the chip at or beyond those ratings will cause the chip to malfunction, even irreversibly damage the chip.

Symbol Name Minimum Maximum Unit Ta Operating temperature -40 85 °C Ts Storage temperature -40 125 Je Vee Supply rail voltage, reference to GND pin -0.5 6.5 Vv Vio IO pin voltage, reference to GND pin -0.5 Vec+0.5 Vv

3.2. DC characteristics Symbol Name Minimum Typical Maximum Unit 5V operation 45 5 5.5 Vee Supply rail voltage Vv 3.3V operation 83) 33) 3.8 lec Operating current 12 30 mA 5V operation 150 200 Isup Sleeping current pA 3.3V operation 50 80 Vit Low input voltage -0.5 0.7 Vv Vin High input voltage 2.0 Vec+0.5 Vv Voi Low output voltage 0.5 Vv Vou High output voltage Vec-0.5 Vv lup Internal pull-up strength 8 150 300 pA Ibn Internal pull-down strength -50 -150 -300 HA Vr Brown-out detector threshold voltage 2.3 2.6 2.9 Vv

3.3. AC characteristics

Symbol Name Minimum Typical Maximum Unit Feik Clock frequency (at pin XI) 11.98 12.00 12.02 MHz Ter Power-on reset time 20 50 ms

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WCH CH340G Datasheet

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DreamCity Innovations WCH CH340G Datasheet 4. Pinout

Pin# Name Direction Comment

1 GND Power | Ground reference of the chip. Connect to the ground pin of USB bus. 2 TXD Output UART Data Transmit output. 3 RXD Input UART Data Receive input.

nternal 3.3V reference for USB physical layer. Decouple with a 4.7-20nF

4 Ve Power capacitor when in 5V operation, or tie to VCC when in 3.3V operation.

5 UD+ = Analog USB D+ signal.

6 UD- Analog USB D- signal.

nput of the crystal oscillator. Connect to the crystal resonator and load

? xl Input capacitors.

8 XO Output conecitors. crystal oscillator. Connect to the crystal resonator and load 9 CTS# Input UART flow control signal Clear to Send. 0 DSR# Input UART flow control signal Data Set Ready. 1 Rl# Input UART flow control signal Ring In. 12 DCD# Input UART flow control signal Data Carrier Detect.

3 DTR# Output UART flow control signal Data Terminal Ready.

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4 RTS# Output UART flow control signal Request to Send.

5 R232 Input Auxiliary RS232 enable. Active high, internal pull down.

6 VCC Power — Supply rail for the chip.

5. Application Notes

CH340 chip have built in USB bus pull-up resistors and on-chip signal termination, UD+ and UD- pins should be connected to the USB bus lines directly.

CH340 have built in power on reset circuitry.

During operation CH340 requires a 12MHz clock signal present at XI pin. Generally this clock signal is provided by connecting a 12MHz crystal resonator and load capacitors between XI and XO pins, and the built-in crystal resonator will provide the required clock signal. When using an external oscillator feed the clock signal into XI pin, and leave XO pin unconnected.

CH340 supports 5V and 3.3V operation. When using 5V operation, supply 5V to VCC pin, and decouple the internal 3.3V reference with a capacitor of 4.7-20nF from V3 pin to ground. When using 3.3V operation, tie V3 pin to VCC pin and supply 3.3V power.

CH340 supports USB device suspension to reduce energy consumption. When NOS# signal is active this feature is disabled. (Note: CH340G does not have this pin.)

Supported hardware flow control signals: CTS#, DSR#, RI#, DCD#, DTR# and RTS#. All flow control pins are software controlled.

Auxiliary pins: IR#, R232, CKO and ACT#. (Note: only R232 is present on CH340G) When R232 signal is asserted the RXD signal is inverted. R232 is latched during Power-On Reset.

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DreamCity Innovations WCH CH340G Datasheet

CH340 have built-in FIFO buffer, and supports simplex, half- and full-duplex asynchronous communication. The UART interface supports 1 start bit, 5-8 data bits, 1 or 2 stop bits, and odd, even, space or mark parity bits. CH340 supports common baud rates: 50, 75, 100, 110, 134.5, 150, 300, 600, 900, 1200, 1800, 2400, 3600, 4800, 9600, 14400, 19200, 28800, 33600, 38400, 56000, 57600, 76800, 115200, 128000, 153600, 230400, 460800, 921600, 1500000, 2000000 baud. Transmitter baud rate error is less than 0.3%, receiver baud rate error tolerance is at most 2%.

The emulated COM port is fully functional. Compatible with most applications using the serial port, without the need of changing existing code.

CH340 can be used to upgrade existing peripherals using serial ports into USB devices, or adding serial ports to a PC. With external level shifting hardware, interfaces including RS232, RS422 and RS485 can be provided.

By adding infrared adapters, CH340 can be used to implement USB to SIR adapter, allowing a PC to communicate with IrDA peripheral.

5.1. Example: USB RS232 adapter

2 2 348 % a) 3 ¢ ? ¢ | 2 a = ; IC2 sll? o we vec TXD 1X x1 SYS Zz GND Rxp [3 ——__RXD = S 4 vg

RTs# [14 —_RTS

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2 )- 13 DTR oO 3 D+ 10 | 10n at 7] y eee 2 DCD Oo +he———2a xe) Ri# Ett —___Rl ! 12M. psre (912 DSR — C3 C4 CTS# He CTS

=, D+

D- R232. -->

GND

MAX213ECWI

The schematic above implements a USB to RS232 adapter based on CH340G and external level adapter MAX213. When implementing this regulator-less 5V board, place capacitor C2 close to the V3 pin.

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DreamCity Innovations WCH CH340G Datasheet 5.2. Example: Optically isolated USB to UART adapter

© > > a’ 6 \ 2] 2 > 6B $48 c c2 = Ic2 slle o ton 18} voc TxD |-2—_DO xi SYS Zz GND RxD }-S—BXD r= 6 4} vg ' 1 C1 aTs# (—14 RIS oo [2 - == pire P3!3___DTR 1D [s De | 10y on 7] y bop? f3i2—DCD 2 + 89) xo Ri O11 ___Al I 1a osry 10 DSB = cs] Ca crs? pye—__cTS { t = pr 5 | p, PN61729-S 22p | 22p p. 6 | rege [15 GND

GND 6 R5 +

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— Ici@si

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oA o<| fe 74LVC1GO6DBV

VDD

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oK C817 R6 1 4 10k lg } g 510 Kk IC3G$2 TxD ° 2 Ys 3 < - a PORT VDD © RXD 10k 4 1 R3. r+ IC3GS$1 5 J | AP 46 510 Oo | 2 GNDIO onpoat Ra 74LVC1GO6DBV R8 10k 1 \ 4 II 5 alle DIR 510 2 vk 3 + a ° POAI7 —L a GNDIO

This adapter provides optically isolated inputs and outputs with 4 PC817 optoisolators. Respect the isolation border when laying out the board, and if possible, cut slots under the optoisolators. The two 74LVC1G06 is optional, but helpful when the input pins cannot source too many current.

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